个人简介

博士、博士生导师、“潇湘学者”特聘教授、湖南省“百人计划”青年项目入选者。2010年7月毕业于清华大学微纳电子系获得学士学位，2013年7月毕业于清华大学微电子所获得硕士学位，2017年9月获得英国帝国理工学院电子工程专业博士学位。2017年4月至2020年8月在帝国理工学院计算机系从事博士后研究工作（导师：Wayne Luk院士）。现主要从事高性能计算和大规模数字电路设计，研究领域包括基于可编程器件（FPGA）的神经网络加速、粒子滤波加速、贝叶斯算法加速和超光谱图像分割等。迄今已在IEEE Trans. on Neural Networks and Learning Systems (TNNLS), IEEE Trans. On Computers (TC)，ACM Trans. on Reconfigurable Technology and Systems (TRETS)，FPGA，DATE、FCCM等刊物上发表高水平学术论文30余篇。授权国家专利一项，申请国际发明专利两项，获得HiPEAC Paper Award。现承担国家自然科学基金青年科学基金项目。

办公室：理学院421

Ｅmail: liu.shuanglong@hunnu.edu.cn

学术贡献

1. 基于FPGA的高性能卷积神经网络加速器

主要研究人工智能中的深度卷积神经网络在边缘器件上的加速方法，包括高计算效率的硬件架构设计、频域卷积神经网络加速方法、硬件加速器的软硬件协同优化等内容。

2. 基于贝叶斯重采样的粒子滤波加速器

主要研究粒子滤波（序贯蒙特卡洛方法）算法及其应用。重点包括粒子滤波中的重采样方法及其硬件实现、粒子滤波算法的并行计算架构设计、粒子滤波硬件加速器的工具设计等。

3. 贝叶斯算法和贝叶斯神经网络的硬件加速

主要研究面向大数据的贝叶斯算法如马尔科夫蒙特卡洛（Markov Chain Monte Carlo，MCMC）的硬件加速方法。主要内容有基于低数值精度下的MCMC加速算法与系统设计、贝叶斯神经网络在硬件上的加速方法研究等。

*Research Positions！ 欢迎想在高性能计算、人工智能硬件加速器和集成电路设计交叉领域从事相关研究的优秀青年加入课题组，攻读硕士、博士或博士后！提供经费和平台支持，并提供参加国际学术会议和国际交流的机会。

*要求：专业基础扎实、对科研感兴趣、勤奋刻苦。欢迎邮件联系。

教学情况

本科生教学：

数字电子技术、电工学

研究生教学：

嵌入式系统及应用、计算机视觉

承担课题

1. 金宝搏官方188“潇湘学者”特聘教授启动经费 (2020/09--，150万)

2. 国家自然科学基金青年科学基金项目(62001165, 2021/01-2023/12，24万)

代表性论文

1. S. Liu, H. Fan, M. Ferianc, X. Niu, H. Shi, W. Luk, Toward Full-Stack Acceleration of Deep Convolutional Neural Networks on FPGAs,IEEE Transactions on Neural Networks and Learning Systems (TNNLS),2021.

2. H. Fan,S. Liu^*, Z. Que, X. Niu, W. Luk, High-Performance Acceleration of 2-D and 3-D CNNs on FPGAs Using Static Block Floating Point,IEEE Transactions on Neural Networks and Learning Systems (TNNLS),2021.

3. S. Liu, H. Fan, and W. Luk, “Accelerating Fully Spectral CNNs with Adaptive Activation Functions on FPGA,” in Design, Automation and Test in Europe Conference (DATE), 2021.

4. H.-C. Ng, I. Coleman,S. Liu, and W. Luk, “Reconfigurable Acceleration of Short Read Mapping with Biological Consideration," in ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2021.

5. S. Liu and W. Luk, “Optimizing Fully Spectral Convolutional Neural Networks on FPGA,” in IEEE International Conference on Field Programmable Technology (FPT), 2020.

6. H.-C. Ng,S. Liu,I. Coleman, and W. Luk, “Acceleration of Short Read Alignment: Exploration of Speed vs Accuracy with Different Strategies," in IEEE International Conference on Field Programmable Technology (FPT), 2020.

7. H. Fan, M. Ferianc,S. Liu, and W. Luk, “RNAS: Reconfigurable CNN Accelerator with Differentiable Neural Architecture Search,” in IEEE International Conference on Computer Design (ICCD), 2020.

8. Liu, Shuanglong, and Wayne Luk. "Towards an Efficient Accelerator for DNN-Based Remote Sensing Image Segmentation on FPGAs." In 2019 29th International Conference on Field Programmable Logic and Applications (FPL), pp. 187-193. IEEE, 2019.

9. Liu, S., Fan, H., Niu, X., Ng, H. C., Chu, Y., & Luk, W. (2018). Optimizing cnn-based segmentation with deeply customized convolutional and deconvolutional architectures on fpga. ACM Transactions on Reconfigurable Technology and Systems (TRETS), 11(3), 1-22，2018.

10. S. Liu, R. Chu, X. Wang, and W. Luk, “Optimizing CNN-based Hyperspectral Image Classification on FPGAs," in 15th International Symposium on Applied Reconfigurable Computing (ARC), 2018.

11. S. Liu, C. Zeng, H. Fan, H.-C. Ng, J. Meng, and W. Luk, “Memory-Efficient Architecture for Accelerating Generative Networks on FPGAs," in IEEE International Conference on Field Programmable Technology (FPT), 2018.

12. H. Fan,S. Liu, M. Ferianc, and W. Luk, “A Real-Time Object Detection Accelerator with Compressed SSDLite on FPGA," in IEEE International Conference on Field Programmable Technology (FPT), 2018.

13. S. Liu, G. Mingas, and C.-S. Bouganis, “An unbiased mcmc fpga-based accelerator in the land of custom precision arithmetic,"IEEE Transactions on Computers, vol. 66, no. 5, pp. 745-758, 2017.

14. R. Zhao,S. Liu, H. Ng, E. Wang, J. Davis, X. Niu, X. Wang, H. Shi, G. Constantinides, P. Cheung, and W. Luk, “Hardware compilation of deep neural networks: An overview," in IEEE International Conference on Application-specific Systems, Architectures and Processors (ASAP), 2018.

15. S. Liu, X. Niu, and W. Luk, “A low-power deconvolutional accelerator for convolutional neural network based segmentation on fpga," in ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (FPGA), 2018, pp. 293-293.

16. S. Liu and C.-S. Bouganis, “Communication-aware mcmc method for big data applications on fpgas," in IEEE International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2017, pp. 9-16.

17. S. Liu, G. Mingas, and C.-S. Bouganis, “An exact mcmc accelerator under custom precision regimes," in IEEE International Conference on Field Programmable Technology (FPT), 2015, pp. 120-127.

18. S. Liu, G. Mingas, and C.-S. Bouganis, “Parallel resampling for particle filters on fpgas," in IEEE International Conference on Field-Programmable Technology (FPT), 2014, pp. 191-198.

19. 刘双龙，张春， 黄钰， 王志华, “一种基于内插采样的时差测量与基站同步技术,"电路与系统学报, vol. 18, no. 2, pp. 173-177, 2013.

获奖情况

1.  湖南省“青年百人计划”（2020年）

2.  Imperial College President's PhD Scholarships（2013年）

3.  Marie Currie Research Fellowship（2012年）